This invention relates generally to computer based diagnostic test equipment for automotive use, and specifically to a technique for rapidly identifying engine data that has been flagged and stored in memory.
The prior art discloses numerous automobile engine diagnostic testing devices that are computer based. One diagnostic tester, identified as the Sun Electric Corporation Model 2001, is described and claimed in U.S. Pat. No. 4,125,894, issued Nov. 14th, 1978, which is incorporated by reference herein. With such a tester, selected analog signals are gathered from the engine under test by one or more suitable probes connected to the engine and the analog signals received therefrom are manipulated, processed and compared with factory specifications for the engine. The data is also displayed on a raster scan cathode ray tube (CRT) display and a print out of test results is also provided.
A recently introduced diagnostic tester that is IBM compatible is the Sun Electric Corporation Model MCA 3000. The MCA 3000 is capable of receiving and processing engine test signals at significantly higher speeds than prior art testers. The high speed of the MCA 3000 is due largely to its data acquisition system (DAS). With the DAS, analog data and test signals obtained from the engine under test are converted by an analog to digital (A/D) converter and stored in an A/D random access memory (RAM), without the intervention of the main system microprocessor or its address/data bus.
In copending application Ser. No. 148,973, a system for generating identification flags for signals, acquired from an engine under test and converted by an analog to digital (A/D) converter, to permit their storage in Random Access Memory (RAM) in a retrievable manner is disclosed. The flags identify the beginning of an event, such as a cylinder firing, a cylinder #1 firing, a solenoid dwell cycle and the like. The flag bits are selected to be more significant than any of the magnitude bits used in the digital words. For example, in a sixteen bit digital word having bits D0-D15, eleven bits (D0-D10) are used for magnitude, one bit (D15) is for the sign of the quantity i.e. positive or negative magnitude, and four bits (D11-D14) are utilizable for flags. In the flag system bit D15 is made equal to the A/D sign bit D11. This is referred to as sign extended 2's complement notation. The flags enable identification of the digital words in the A/D RAM memory and facilitate efficient utilization of that data.
The present invention is specifically concerned with a technique for rapidly and efficiently identifying the presence of the flags and enabling the determination of the RAM address locations where flagged data resides. In particular the present invention utilizes a parity check routine that is resident in the system microprocessor controller. The present invention is independent of either of the inventions in the copending applications although the use of all of the inventions together produces a highly beneficial system. It will be noted that the dual ported speed memory of copending application Ser. No. 148,974 enables flag generation completely independent of the system controller. The system controller in the preferred embodiment is the microprocessor in an IBM compatible PC having 640 kilobytes of system memory. An additional 128 kilobyte dual ported RAM comprises the A/D RAM and permits acquiring and storing data by the data acquisition system (DAS) substantially independently. The DAS A/D RAM memory is plugged into a card slot in the IBM compatible PC that is normally reserved for a ROM cartridge. While the entire system is generally described herein, those portions that relate to flag generation and the dual ported speed up memory are specifically described and claimed in the respective copending applications.